SSTC - direct primary drive half-bridge

Streamer/sword length a bit below 30cm. 3A from 230Vac mains. f_res 120kHz using a large secondary wound on two polyprop. buckets, no topload. (A 300kHz secondary gave only 10cm at the same input current).

>> PCB of the up-to-date half-bridge section and older/obsolete driver circuit PCBs
Previous TLC555 based gate driver section, for reference only:

[schematic 1]

Click for enlargement. 555 signal generator and gate drive transformer schematic.
The transformer shown is the gate drive transformer for the two mosfets in the half-bridge.

A constant 50% duty cycle mode is achieved by feeding back the output via timing pot R5. For a non-cmos-555 the max usable frequency still having 50% duty is around 250..300kHz, for the cmos version it is much higher. Bipolar transistors: left ones 500mA 50V, middle ones >=1A 50V. Mosfets: n channel and p channel, >=5A >=40V each.

Because of the bipolar transistor buffer stages' V_be voltage drops and the mosfets' V_t threshold voltages, the output to the transformer is only about 5V peak to peak (from 0V+2*V_be+V_t to 12V-2*V_be-V_t), and that's an utterly lousy result. The gate drive transformer drive part of this circuit is absolutely useless... However, the square wave generator i.e. everything to the left of R1 is ok and works well. Values for C7, R4 and R5 need a bit of experimentation to get the desired frequency range.

CD4049 based driver with a vastly improved gate drive section:

05/2009: by now the market with high peak current mosfet gate driver chips has exploded and much better performance can be had with a of one of those chips (google low-side mosfet driver). Many are available as free samples! Replace buffer and drive sections below with one such chip. E.g. UCC27424D, UCC37322, MAX4420, MAX628, LM5111, IR4427, ... many other series.

[schematic 2]    Eagle files
single ended, with 50% duty signal generator CD4046 VCO/PLL on the left

[schematic 3]    Eagle files
double ended, signal fed into jumper JP1. T2 and T4 are p-channel,
T1 and T3 are n-channel fets. D1-D4 aren't BAT81 but 5.1V zeners.
D5-D8 are 30V 1A schottkys. R4 is a jumper/wire.

Both above circuits run from 12 to 15V. The output for driving the gate drive transformer(s) is rail-to-rail, i.e. 0V to 12V or 15V. In schematic [2], a very cheap phase locked loop (PLL) chip (CD4046) is used which has an on-board voltage controlled oscillator (VCO). Only the 50% duty VCO is used in this circuit.

The main purpose of using CD4049 hex inverter ICs, some zeners and a few cheap mosfets is to get high peak output currents to drive paralleled mosfets in a half- or full-bridge. The circuit by far outperforms expensive mosfet driver ICs. I for example tested 220nF at 300kHz, no problem, about 200ns rise and fall times from +12V to -12V. The only weakness is that the mosfets warm up a little. Heating is independend of the load and only depends on the frequency and value of zeners D1-D2 (D1-D4). Above 200kHz operation I'd recommend using small heatsinks.

The n- and p-channel mosfets here should be surplus or junk-box parts, any will work, so you can make a cheap driver. Alternatively, fets may be replaced with fast bipolars: upper fets replaced by npn and lower by pnp, and diodes remove diodes D1-D2 (schem 2) or D1-D4 (schem 3) - the drawback will be that the output isn't rail to rail 0V..Vcc after this, but only about 2V...Vcc-2V.

Schematic 2 parts explanation:

Timing components: R2 between 10k and 22k, C1 between 50 and 120 picoFarad. This gives f_max...0 Hz. Lowest possible output frequency can be set higher by adding a t.ex. 220k resistor between pin 12 of CD4046 and ground.

Frequency adjustment: the frequency is determined by the voltage applied to pin 9 of the CD4049 (VCO_IN). R1 tune pot 100kOhm linear, upper pot R3 10kOhm linear. These values aren't critical, 220k and 10k or 470k and 22k etc are fine as well.

Interruptor: if you want to use a low frequency interruptor circuit together with this driver, you can connect the interruptor to the inhibit pin 5 (INH) of the CD4046.

Logic buffer section: uses CD4049 hex inverters. Here they are used as a simple power preamp for driving the two (or four) larger mosfets. Stacking two CD4049 directly on top of each other to increase current is a good idea.

Schematic 3 shows how to interface a 5V logic level drive signal to this 12V..15V drive circuit. This is done with the voltage divider R1 and R2 (t.ex. 47kOhm) and capacitive input coupling via C5 (t.ex. 1nF..22nF).

Section for driving the bridge gate drive transformer: two zeners 5.1V >=1/4 Watt, although any zener between 4V and 5.1V should do. Two cheap >=5A >=40V mosfets. My circuit uses IRFZ22 and IRFU9024 because those were the cheapest ones available here.

The upper mosfet is  p-channel, the lower n-channel, and they are connected as common-drain in this schematic. The local decoupling capacitor C3, 330uF 16V tantalum, is essential. 47uF or 100uF will work too, I used 330uF tantals as they were surplus...

There is a slight current shoot-through condition (short circuit) on each switch transition which can not be avoided, at least not with any simple circuit and without reducing the duty cycle. Luckily the two zeners help to minimize this current - thanks to Malcolm Watts for this good idea.
Using 5.1V zeners and running at 300kHz, the two mosfets will start to warm up, so a small heatsink is recommended if running above 200kHz for longer times. You can mount both mosfets on the same heatsink, as the circuit is common-drain anyway so the mosfet metal backplates (=drain) can be connected together.

Transformer coupling: The gate drive xfmr series capacitor C2 can be 10uF electrolytic (for schematic 3, use a non-polar electrolytic or two electrolytics in series with common negative terminal). Place a small 10nF polypropylene capacitor in parallel for the HF currents. I used a surplus 1uF (1000nF) 16V polypropylene pulse cap plus two back-to-back/series'ed 47uF 50V electrolytics, works nice.

For pulse transformer design, see general SSTC design notes.


Half-bridge section: 

Click for enlargement. Schematic for the off-line half-bridge. Transformers on the left depict
the single gate drive xfmr of the 555 schematic. The xfmr has two isolated secondary windings.

Don't ground any part of this circuit!

This is the actual half-bridge. The mains voltage is rectified by D9 which should be some standard >3A 600V diode, but not one of the 1N400x series which are only 1A.

The capacitors smooth out the rectified mains and place one end of the primary coil, L1, in the middle of the supply voltage (0V). The other end is switched up and down, to +160V and -160V. The 470nF caps should be FKP or MKP types, i.e. suitable for high pulsed currents, and have a 250VAC rating, although 120VAC ones will survive too.

The mosfets can be IRF740 or IRF780, for sake of lesser expenses. Two >8A >400V n-channel mosfets will work (usually a higher current rating also implies a lower channel on-resistance, so for the same power level there's less heating => a smaller heatsink can be used).

The zener diodes on the gates are 18V 1/2W.

Diodes D5 and D6 are soft recovery ultrafast diodes, >2A >400V, with a reverse recovery time < 200ns. For <200kHz operation a diode from the BYW34 - BYW36 series should be ok. For >200kHz, the much faster SF26 - SF28 with max 50ns recovery are better. Don't use avalanche diodes - it is the recovery time that should be ultrafast.

D7 and D8 can be any cheap >3A >10V schottkys like 1n5822 - the voltage rating doesn't matter much as these diodes will not see high reverse voltages (t.ex. a 40V schottky is already an exaggeration).

Both mosfets must be mounted on their own heatsinks. Although switching losses are small when the driver is in tune with the TC secondary, these mosfets still have a drain-source resistance that is typically around 0.5 ohms, so 3A rms means about 3W resistive losses per mosfet (5W total). Add a few watts for switching losses. Without a heatsink, the heating could become unhealthy...

Forced air cooling with a 12VDC fan is a good idea. Dead PC power supplies are the best (free!) source for encasings with good air flow and a working 12V fan included.

The PCBs and the Eagle schematic for the half-bridge are available here:
>> half-bridge PCB


This is what the finished half-bridge looks like. The two long screws in the centre of the board are used as connectors for the primary coil.


(C) 2001 Jan Wagner