Discrete high current gate driver
This is the same gate drive circuit as on the halfbridge SSTC schematics page. The circuit is useful for driving large H-bridges (4 or more more MOSFETs) via one or more gate drive transformers. Old i.e. cheap and readily available MOSFETs have a large gate capacitance and require an equally beefy gate drive. A pair of TC442x mosfet driver chips is not always sufficient to drive the H-bridge. One solution is to order more TC442x sample parts and either parallel them up and drive one gate drive xfmr, or split the bridge to be driven by two or four xfmrs - each mosfet has its own xfmr, with its own TC442x pair. An alternative is the circuit presented here. Because it uses discrete mosfets to drive the transformer, the max peak output current is mainly a matter of choosing the mosfets. For example, 30A peak is possible, vs the fixed 9A max of a TC4429. In addition, the low-voltage high-current n/p-channel mosfets used here are typical junk box and surplus parts, so the circuit should be quite inexpensive to build.
Update: now www.ixys.com has a new line of seriously impressive 30Apeak high-current high-speed gate drive chips, working at stunning frequencies. It's the IXD 430 series, e.g. IXDD430CI and others (datasheet). These are a discrete alternative, which is in all respects better than the circuit below. Secondly, DigiKey now (01/2004) carries the older 14Apeak IXDD414 series (IXDD414CI-ND, ~$3 SUP) which too might be a useful alternative.
[schematic 1] Eagle files, including PCB
The schematic in the Eagle files is an old, slightly messier looking version. All parts and connections are nevertheless the same. The components are described above in the schematic. Essentially, the following parts are required: a couple of CD4049's, four 1A 30V schottkys, four 5.1V or 4.7V 1/2W zeners, two n-channel and two p-channel MOSFETS (e.g. 30V 15A, not logic-level versions), and some good quality capacitors.
The output for driving the gate drive transformer(s) is rail-to-rail, i.e. 0V to 15V (or what you have). The only functional weakness of the circuit is that the mosfets warm up at high drive frequencies, somewhat independend of the load. Heating is caused by short conduction overlaps when the mosfets are switched/toggled (shoot-through current), which means the heating is proportional to the drive frequency. The zeners D1-D4 ensure that one mosfet does not yet reach its threshold voltage while the other mosfet is still fully enhanced. This adds a bit of dead time to the switching and reduces the shoot-through. A bad side effect of the zeners is that the mosfet gate voltage is reduced and they might operate outside the triode region, causing some additional warm-up.
In any case, to operate above 200kHz (hmm, a multi-kW coil running at >200kHz? not very likely... :-)) you should use small heatsinks for the mosfets. Two heatsinks in total are sufficient, one for each n+p channel mosfet pair, with no backtab isolation required because the circuit's common drain configuration => common TO-220 metal backtabs.
Caution: this circuit adds some delay to the incoming signal. It's about 200..300ns. Because of this, the circuit is not useful for the feedback/self-resonant type of SSTCs that require minimum phase shift between the feedback input and bridge drive output. For the other SSTC types it works just fine.
(C) 2001 Jan Wagner